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Implement riscv_vlen_asm for riscv32

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riscvcap.c: undefined reference to 'riscv_vlen_asm'

Reviewed-by: Paul Dale <ppzgs1@gmail.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/24270)
This commit is contained in:
Hongren Zheng 2024-04-26 06:03:43 +00:00 • committed by Tomas Mraz
parent 3de3d481b2
commit 87314d24c4
1 changed files with 17 additions and 0 deletions
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17
crypto/riscv32cpuid.pl
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@ -84,5 +84,22 @@ OPENSSL_cleanse:
___
}
{
my ($ret) = ('a0');
$code .= <<___;
################################################################################
# size_t riscv_vlen_asm(void)
# Return VLEN (i.e. the length of a vector register in bits).
.p2align 3
.globl riscv_vlen_asm
.type riscv_vlen_asm,\@function
riscv_vlen_asm:
csrr $ret, vlenb
slli $ret, $ret, 3
ret
.size riscv_vlen_asm,.-riscv_vlen_asm
___
}
print $code;
close STDOUT or die "error closing STDOUT: $!";