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Preserve callee-saved registers in aarch64 AES-CTR code

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The AES-CTR assembly code uses v8-v15 registers, they are
callee-saved registers, they must be preserved before the
use and restored after the use.

Change-Id: If9192d1f0f3cea7295f4b0d72ace88e6e8067493

Reviewed-by: Shane Lontis <shane.lontis@oracle.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/23233)
This commit is contained in:
fangming.fang 2024-01-08 09:35:46 +00:00 • committed by Tomas Mraz
parent 806bbafe2d
commit 1d1ca79fe3
1 changed files with 11 additions and 3 deletions
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14
crypto/aes/asm/aesv8-armx.pl
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@ -1780,8 +1780,12 @@ $code.=<<___ if ($flavour =~ /64/);
${prefix}_ctr32_encrypt_blocks_unroll12_eor3:
AARCH64_VALID_CALL_TARGET
// Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp x29,x30,[sp,#-80]!
stp d8,d9,[sp, #16]
stp d10,d11,[sp, #32]
stp d12,d13,[sp, #48]
stp d14,d15,[sp, #64]
add x29,sp,#0
ldr $rounds,[$key,#240]
@ -2486,7 +2490,11 @@ ${prefix}_ctr32_encrypt_blocks_unroll12_eor3:
vst1.8 {$in0},[$out],#16
.Lctr32_done_unroll:
ldr x29,[sp],#16
ldp d8,d9,[sp, #16]
ldp d10,d11,[sp, #32]
ldp d12,d13,[sp, #48]
ldp d15,d16,[sp, #64]
ldr x29,[sp],#80
ret
.size ${prefix}_ctr32_encrypt_blocks_unroll12_eor3,.-${prefix}_ctr32_encrypt_blocks_unroll12_eor3
___